This part of IEC 60747 gives product specific standards for terminology, letter symbols, essential ratings and characteristics, verification of ratings and methods of measurement for insulated-gate bipolar transistors (IGBTs). The major changes with respect to the previous edition are mainly of an editorial nature.<\/p>\n
| PDF Pages<\/th>\n | PDF Title<\/th>\n<\/tr>\n | ||||||
|---|---|---|---|---|---|---|---|
| 4<\/td>\n | English CONTENTS <\/td>\n<\/tr>\n | ||||||
| 7<\/td>\n | 1 Scope 2 Normative references 3 Terms and definitions 3.1 Graphical symbol of IGBT <\/td>\n<\/tr>\n | ||||||
| 8<\/td>\n | 3.2 General terms 3.3 Terms related to ratings and characteristics; voltages and currents <\/td>\n<\/tr>\n | ||||||
| 10<\/td>\n | 3.4 Terms related to ratings and characteristics; other characteristics <\/td>\n<\/tr>\n | ||||||
| 12<\/td>\n | 4 Letter symbols 4.1 General 4.2 Additional general subscripts <\/td>\n<\/tr>\n | ||||||
| 13<\/td>\n | 4.3 List of letter symbols <\/td>\n<\/tr>\n | ||||||
| 14<\/td>\n | 5 Essential ratings and characteristics 5.1 Ratings (limiting values) <\/td>\n<\/tr>\n | ||||||
| 15<\/td>\n | 5.2 Characteristics <\/td>\n<\/tr>\n | ||||||
| 17<\/td>\n | 6 Measuring methods 6.1 General 6.2 Verification of ratings (limiting values) Table 1 \u2013 Acceptance-defining characteristics <\/td>\n<\/tr>\n | ||||||
| 18<\/td>\n | Figures Figure 1 \u2013 Circuit for measuring the collector-emitter voltages VCES, VCER, VCEX <\/td>\n<\/tr>\n | ||||||
| 19<\/td>\n | Figure 2 \u2013 Circuit for testing the gate-emitter voltage \u00b1VGES <\/td>\n<\/tr>\n | ||||||
| 20<\/td>\n | Figure 3 \u2013 Circuit for measuring collector current <\/td>\n<\/tr>\n | ||||||
| 21<\/td>\n | Figure 4 \u2013 Circuit for measuring peak collector current <\/td>\n<\/tr>\n | ||||||
| 22<\/td>\n | Figure 5 \u2013 Test circuit of reverse safe operating area (RBSOA) Figure 6 \u2013 Waveforms of gate-emitter voltage VGE and collector current IC during turn-off <\/td>\n<\/tr>\n | ||||||
| 23<\/td>\n | Figure 7 \u2013 Circuit for testing safe operating pulse width at load short circuit (SCSOA1) <\/td>\n<\/tr>\n | ||||||
| 24<\/td>\n | Figure 8 \u2013 Waveforms of gate-emitter voltage VGE, collector current IC and voltage VCE during load short-circuit condition SCSOA1 <\/td>\n<\/tr>\n | ||||||
| 25<\/td>\n | Figure 9 \u2013 Short-circuit safe operating area 2 (SCSOA2) Figure 10 \u2013 Waveforms during SCSOA2 <\/td>\n<\/tr>\n | ||||||
| 26<\/td>\n | 6.3 Methods of measurement Figure 11 \u2013 Circuit for measuring the collector-emitter sustaining voltage VCE*sus <\/td>\n<\/tr>\n | ||||||
| 27<\/td>\n | Figure 12 \u2013 Operating locus of the collector current <\/td>\n<\/tr>\n | ||||||
| 28<\/td>\n | Figure 13 \u2013 Circuit for measuring the collector-emitter saturation voltage VCEsat <\/td>\n<\/tr>\n | ||||||
| 29<\/td>\n | Figure 14 \u2013 Basic circuit for measuring the gate-emitter threshold voltage <\/td>\n<\/tr>\n | ||||||
| 30<\/td>\n | Figure 15 \u2013 Circuit for measuring the collector cut-off current <\/td>\n<\/tr>\n | ||||||
| 31<\/td>\n | Figure 16 \u2013 Circuit for measuring the gate leakage current <\/td>\n<\/tr>\n | ||||||
| 32<\/td>\n | Figure 17 \u2013 Circuit for measuring the input capacitance <\/td>\n<\/tr>\n | ||||||
| 33<\/td>\n | Figure 18 \u2013 Circuit for measuring the output capacitance <\/td>\n<\/tr>\n | ||||||
| 34<\/td>\n | Figure 19 \u2013 Circuit for measuring the reverse transfer capacitance <\/td>\n<\/tr>\n | ||||||
| 35<\/td>\n | Figure 20 \u2013 Circuit for measuring the gate charge Figure 21 \u2013 Basic gate charge waveform <\/td>\n<\/tr>\n | ||||||
| 36<\/td>\n | Figure 22 \u2013 Circuit for measuring the short-circuit internal gate resistance <\/td>\n<\/tr>\n | ||||||
| 37<\/td>\n | Figure 23 \u2013 Circuit for measuring turn-on times and energy <\/td>\n<\/tr>\n | ||||||
| 38<\/td>\n | Figure 24 \u2013 Waveforms during turn-on times <\/td>\n<\/tr>\n | ||||||
| 39<\/td>\n | Figure 25 \u2013 Circuit for measuring turn-off times and energy Figure 26 \u2013 Waveforms during turn-off times <\/td>\n<\/tr>\n | ||||||
| 41<\/td>\n | Figure 27 \u2013 Circuit for measuring the variation with temperature of the collector- emitter voltage VCE at a low measuring current IC1 and for heating up the IGBT by a high current IC2 <\/td>\n<\/tr>\n | ||||||
| 42<\/td>\n | Figure 28 \u2013 Typical variation of the collector-emitter voltage VCE at a low measuring current IC1 with the case temperature Tc (when heated from outside, i.e. Tc = Tvj) <\/td>\n<\/tr>\n | ||||||
| 43<\/td>\n | Figure 29 \u2013 Circuit for measuring thermal resistance and transient thermal impedance: method 2 <\/td>\n<\/tr>\n | ||||||
| 44<\/td>\n | Figure 30 \u2013 Typical variation of the gate-emitter threshold voltage VGE(th) at a low measuring current IC2 with the case temperature Tc (when heated from the outside, i.e. Tc = Tvj) <\/td>\n<\/tr>\n | ||||||
| 45<\/td>\n | 7 Acceptance and reliability 7.1 General requirements 7.2 Specific requirements Figure 31 \u2013 IC, VGE and Tc with time <\/td>\n<\/tr>\n | ||||||
| 46<\/td>\n | Figure 32 \u2013 Circuit for high-temperature blockings Table 2 \u2013 Acceptance-defining characteristics for endurance and reliability tests <\/td>\n<\/tr>\n | ||||||
| 47<\/td>\n | Figure 33 \u2013 Circuit for high-temperature gate bias Figure 34 \u2013 Circuit for intermittent operating life <\/td>\n<\/tr>\n | ||||||
| 48<\/td>\n | 7.3 Type tests and routine tests Figure 35 \u2013 Expected number of cycles versus temperature rise dTvj <\/td>\n<\/tr>\n | ||||||
| 49<\/td>\n | Table 3 \u2013 Minimum type and routine tests for IGBTs when applicable <\/td>\n<\/tr>\n | ||||||
| 50<\/td>\n | Annex A (normative) Measuring method for collector-emitter breakdown voltage Figure A.1 \u2013 Circuit for testing the collector-emitter breakdown voltage <\/td>\n<\/tr>\n | ||||||
| 52<\/td>\n | Annex B (normative) Measuring method for inductive load turn-off current under specified conditions Figure B.1 \u2013 Measuring circuit for inductive load turn-off current Figure B.2 \u2013 Waveforms of collector current IC and collector voltage VCE during turn-off <\/td>\n<\/tr>\n | ||||||
| 54<\/td>\n | Annex C (normative) Forward biased safe operating area (FBSOA) Figure C.1 \u2013 Test circuit of forward biased safe operating area (method 1) <\/td>\n<\/tr>\n | ||||||
| 55<\/td>\n | Figure C.2 \u2013 Typical dVCE versus collector-emitter voltage VCE characteristics Figure C.3 \u2013 Typical forward biased safe operating area <\/td>\n<\/tr>\n | ||||||
| 56<\/td>\n | Figure C.4 \u2013 Circuit testing forward biased safe operating area (method 2) <\/td>\n<\/tr>\n | ||||||
| 57<\/td>\n | Figure C.5 \u2013 Latching mode operation waveforms Figure C.6 \u2013 Latching mode I-V characteristic <\/td>\n<\/tr>\n | ||||||
| 58<\/td>\n | Annex D (normative) Case non-rupture <\/td>\n<\/tr>\n | ||||||
| 59<\/td>\n | Bibliography <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":" Semiconductor devices. Discrete devices – Insulated-gate bipolar transistors (IGBTs)<\/b><\/p>\n |