IEEE 1596.4-1996
$87.75
IEEE Standard for High-Bandwidth Memory Interface Based on Scalable Coherent Interface (SCI) Signaling Technology (RamLink)
| Published By | Publication Date | Number of Pages |
| IEEE | 1996 | 98 |
New IEEE Standard – Inactive-Withdrawn. A high-bandwidth interface optimized for interchanging data between a memory controller and one or more dynamic RAMs is specified. RamLink is an applicable interface for other RAM-like devices as well.
PDF Catalog
| PDF Pages | PDF Title |
|---|---|
| 1 | Title Page |
| 3 | Introduction |
| 4 | Participants |
| 6 | CONTENTS |
| 8 | 1. Overview 1.1 Scope |
| 9 | 1.2 Purpose 1.3 Document structure |
| 10 | 1.4 Objectives |
| 11 | 1.5 Expected applications |
| 14 | 2. References 3. Definitions 3.1 Conformance levels 3.2 Definitions of RAM and interconnect-related terms |
| 17 | 3.3 Bit and byte ordering within packets |
| 18 | 3.4 Bit and byte ordering within CSRs 3.5 Field notation (italics and bold usage) 3.6 Numerical values |
| 19 | 3.7 Signaling layers |
| 20 | 4. RamLink configurations 4.1 Simple topologies 4.2 Hierarchical topologies |
| 21 | 4.3 Hybrid signaling |
| 22 | 4.4 Wide (9-bit) data transfers |
| 23 | 4.5 DRAM error-checking options |
| 25 | 4.6 Link error-checking |
| 26 | 5. RamLink operation 5.1 Split-response transactions |
| 27 | 5.2 Response scheduling 5.3 Retried transactions 5.4 RamLink address space |
| 28 | 5.5 Address errors |
| 29 | 5.6 Request queue sizes 5.7 Request ordering |
| 30 | 5.8 Refresh operations |
| 31 | 5.9 Rate adjustments |
| 32 | 6. Packet formats 6.1 Packet components |
| 36 | 6.2 Request packet formats |
| 38 | 6.3 Copy packet |
| 39 | 6.4 Event packets |
| 42 | 6.5 Response packets |
| 44 | 6.6 Retry packet format 6.7 Idle packets |
| 45 | 6.8 Special initialization packets |
| 46 | 7. RamLink initialization 7.1 standBy mode 7.2 shutDown mode |
| 47 | 7.3 shutOff recovery |
| 48 | 7.4 Self test and initialize |
| 49 | Annex A Bibliography |
| 50 | Annex B RingLink signaling |
| 58 | Annex C SyncLink signals |
| 63 | Annex D Control and status |
| 74 | Annex E I/O extensions |
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