IEEE 1005 1991
$41.17
IEEE Standard Definitions and Characterization of Floating Gate Semiconductor Arrays
| Published By | Publication Date | Number of Pages |
| IEEE | 1991 | 41 |
New IEEE Standard – Inactive – Superseded. This standard describes the underlying physics and the operation of floating gate memory arrays, specifically, UV erasable EPROM, byte rewritable E2PROMs, and block rewritable flash EEPROMs. In addition, reliability hazards are covered with focus on retention, endurance, and disturb. There are also clauses on the issues of testing floating gate arrays and their hardness to ionizing radiation.
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